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High speed SRAM is broadly used in many areas. SRAM as random access memory is the highest fast memory for "Write" or "Read" operating. High speed SRAM can immediately access data as soon as you ask "Read" or "Write" operating at the address.
So you can read or write data of the address in one cycle of the clock. To make faster High speed SRAM need to reduce the clock cycle time and increase the clock latency. Please refer the product list to see more information which have the interaction between cycle time and latency of the clock.
High speed SRAM is mainly used for the Networking appilcation and the cache memory of Server system.

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Networking application

Network servers and equipment need blazing fast, efficient buffers. Quadruple/DDR family and NTRAM/SPB synchronous SRAMs offer optimized performance for switches, hubs, routers, and network servers.

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Server application

Data servers are shaped by their L3 caches. The faster the cache - the better the server. Synchronous SRAMs are the fastest in the industry enabling peak performance for computing applications.

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Product List

Product	SPB	FT	NTSRAM		DDR II			DDR II+		Quadruple I		Quadruple II		Quadruple II+
			SPB	FT	2B	4B	2B	2B_2.0	2B_2.5	2B	4B	2B	4B	4B_2.0	4B_2.5
Max Freq.	250MHz	133MHz	250MHz	133MHz	300MHz	300MHz	300MHz	450MHz	550MHz	167MHz	167MHz	300MHz	333MHz	450MHz	550MHz
I/O	Common	Common	Common	Common	Common	Common	Separate	Common	Common	Separate	Separate	Separate	Separate	Separate	Separate
Input CLK	K	K	K	K	K,K#	K,K#	K,K#	K,K#	K,K#	K,K#	K,K#	K,K#	K,K#	K,K#	K,K#
Output CLK(C,C#)	·	·	·	·	∨	∨	∨	∨	∨	∨	∨	∨	∨	∨	∨
Echo CLK(CQ, CQ#)	·	·	·	·	∨	∨	∨	∨	∨	∨	∨	∨	∨	∨	∨
Interface	LVTTL	LVTTL	LVTTL	LVTTL	HSTL	HSTL	HSTL	HSTL	HSTL	HSTL	HSTL	HSTL	HSTL	HSTL	HSTL
Data Rate	SDR	SDR	SDR	SDR	DDR	DDR	DDR	DDR	DDR	DDR	DDR	DDR	DDR	DDR	DDR
Write type	Standard	Standard	2Late	1Late	1Late	1Late	1Late	1Late	1Late	Early	1Late	Early	1Late	1Late	1Late
Read Latency	1Pipe	0Pipe	1Pipe	0Pipe	1.5Pipe	1.5Pipe	1.5Pipe	2.0Pipe	2.5Pipe	1Pipe	1Pipe	1.5Pipe	1.5Pipe	2.0Pipe	2.5Pipe
Burst Order	Optional	Optional	Optional	Optional	Fixed	Fixed	Fixed	Fixed	Fixed	Fixed	Fixed	Fixed	Fixed	Fixed	Fixed
Byte Write	∨	∨	∨	∨	∨	∨	∨	∨	∨	∨	∨	∨	∨	∨	∨
ZQ	·	·	·	·	∨	∨	∨	∨	∨	∨	∨	∨	∨	∨	∨
DLL	·	·	·	·	∨	∨	∨	∨	∨	∨	∨	∨	∨	∨	∨
Control	ADV#, ADSP#, ADSC#, OE#,CS# ZZ,GW# BW#, LBO#	ADV#, ADSP#, ADSC#, OE#,CS# ZZ,GW# BW#, LBO#	ADV, WE# OE#, CS#, ZZ, LBO#	ADV, WE# OE#, CS#, ZZ, LBO#	LD#, R/W#	LD#, R/W#	LD#, R/W#	LD#, R/W#	LD#, R/W#	R#,W#	R#,W#	R#,W#	R#,W#	R#,W#	R#,W#
PKG	100TQFP	100TQFP	100TQFP 165FBGA	100TQFP 165FBGA	165FBGA	165FBGA	165FBGA	165FBGA	165FBGA	165FBGA	165FBGA	165FBGA	165FBGA	165FBGA	165FBGA